By Ed Sperling, Electronic News, 04/26/2004
This article © Reed Business Information, a division of Reed Elsevier Inc.
The future of power management literally may be new math.
At least that's the contention of Arithmatica, a start-up that today will unveil a more efficient algorithmic model for chips. And while the original goal was to make chips run faster, the more practical application may be to use less power to do the same things.
Arithmatica's whole reason for existence is to implement complex mathematical functions in chips.
"Every high-speed CPU is limited by addition in a critical path," said Dave Burow, the company's president and CEO. "In the Pentium, more than three quarters of the chip is devoted to cache. With DSPs, it's all about floating point performance. In a media processor, encoding is the bottleneck. Error correction is another bottleneck."
Arithmatica believes it can increase the speed of processors by 10 percent to 15 percent. But Burow noted that Xilinx has seen performance increases of 50 percent. And in the security chip market, performance has more than doubled.
The company already has inked deals with Xilinx, which will incorporate Arithmatica's CellMath technology in its next-generation Virtex with embedded DSP; Nvidia, which will use the technology in its GeForce 6 graphics accelerator; and Layer N Networks, which will use the technology to speed multiplication functions for its security chips.
Arithmatica will license its technology as configurable libraries for a one-time fee.
The privately held company, based in Redwood City, does most of its development work in the United Kingdom.
